With the advent of battery operated personal computers there has become a need to monitor and control the distribution of power to peripheral components which operate in conjunction with the personal computer and perform various tasks. Such peripheral components may include keyboards, display screens, printers, modems, additional disk drives, etc. In industrial applications these peripheral components may also include valves, relays, solid state switches, etc. as output devices and transducers, sensing apparatus, etc., as input devices. In order to monitor, distribute and conserve power used by these peripheral devices, centralized power management units have been developed. These power management units, which either stand alone or are integrated into a system component, reduce power consumption by using two techniques. The first technique involves reducing the clock speed of the central processing unit (CPU) during periods of system inactivity, whereas the second technique involves switching the power "on" to a peripheral and its associated controller when use of the peripheral is required, and switching the power "off" during periods when the functions of the peripheral component are not needed. The centralized power management units perform the distinct functions of monitoring the activity of the peripheral components, controlling the clock speed of the CPU, regulating the power supply for all system components, and switching power "on" and "off" to appropriate peripheral components as required to minimize power consumption within the system.
The foregoing centralized power management system, by reason of the number and variety of tasks it must perform, is complex structurally and operationally. This type of power management system must be configured for the number and type of peripherals connected to the computer in order to adequately control power to these peripherals. In addition, since the centralized power management system turns power "off" to inactive peripherals and their respective controllers, the situation wherein a peripheral has its power turned "off" can lead to power leakage from the system bus through the bus interface microchips. When a peripheral has its power turned "off", the active bus signals connected to the interface microchips that are "off" in the peripheral controller result in partially powering these interface microchips via the substrate diode inherent in most integrated circuits. This substrate diode provides a path for the active input signals to the power supply bus in the peripheral and its associated controller which is supposed to be "off". The result is that all the components which are supposed to be "off" in the peripheral are actually partially powered and in a quasi-active state in which they consume power from the system. This power leakage through the bus interface microchips can significantly affect power consumption in the system.
Because of these inherent disadvantages, it has become desirable to develop a power management system which is less complex with respect to structure and operation, and which eliminates interface power leakage.